Devices and methods for effecting electrical interconnection between two conductors are generally known. A specialized area of such interconnection has been recently expanding with the advent of integrated circuit technology. For example, in the manufacturing process for fabricating integrated circuit devices, each integrated circuit must be tested for operativeness. Thus, each lead of an integrated circuit device must be interconnected with a tester apparatus, wherein the tester apparatus may determine the functionality and performance of the corresponding integrated circuit device.
During such testing, an integrated circuit device is typically placed into an interconnect device (such as a test socket). The interconnect device interconnects each lead of the integrated circuit with a corresponding terminal of a printed circuit board. This may be accomplished with a number of contacts within the interconnect device. A tester apparatus is then electrically coupled to the printed circuit board such that the signals provided to each lead of the integrated circuit may be controlled and/or observed by the tester apparatus.
A further specialized area of interconnecting electrical contacts focuses on the interconnection of two printed circuit boards. These interconnections have applications utilizing insertable boards, such as memory cards, or multi-chip boards which are highly miniaturized and integrated.
Several technologies for packaging an integrated circuit chip into an semi-conductor package have been developed. These may be generally categorized as pin grid array (PGA) systems and leaded semi-conductor devices. The leaded semi-conductor devices include plastic leaded chip carriers (PLCC), dual in-line packages (DIP) and Quad Flat Pack (QFP). Each packaging type requires a particular array of leads to be interconnected with a printed circuit board.
A number of methods for connecting integrated circuits, such as PGA devices, with a printed circuit board are known. It is believed that limitations to these systems are the contact length and the usual requirement of mounting the contacts in through-holes located in a printed circuit board. The contact and through-hole mounting limits the mounting speed of the semi-conductor device while inducing discontinuities and impedance which cause signal reflections back to the source. Further, the design causes high lead inductance and thus problems with power decoupling and may result in cross-talk with closely adjacent signal lines.
Johnson recently disclosed in U.S. Pat. No. 5,069,629 (issued Dec. 3, 1991) and U.S. Pat. No. 5,207,584 (issued May 4, 1993) electrical interconnect contact systems which are directed to addressing both mechanical and electrical considerations of such systems. The disclosure of these references is incorporated herein by reference.
The disclosures of Johnson are directed to an interconnect device which comprises a generally planar contact which is received within one or more slots of a housing. In one embodiment, each contact is of a generally S-shaped design and supported at two locations (the hook portions of the S) by a rigid first element and an elastomeric second element. As disclosed, the Johnson electrical interconnect provides a wiping action which enables a good interface to be accomplished between the contact and the lead of the integrated circuit, and between the contact and terminals on a printed circuit board. Further, Johnson discloses an electrical contact that can sustain high operating speeds, and provides a very short path of connection. Such a contact may have low inductance and low resistance, thereby minimizing the impedance of the contact.
In recent years, the number of leads which may extend from one of the above referenced semi-conductor packages has substantially increased. Integrated circuit technology has allowed the integration of several complex circuits onto a single integrated circuit. Often, hundreds of thousands of gates may be incorporated into a single chip. A consequence of such integration is often a requirement that many input/output leads must extend from a corresponding semi-conductor package. To limit the overall dimensions of the semi-conductor package, the spacing between leads of many of the above referenced semi-conductor packages has decreased. As a result thereof, the spacing between the contacts of a corresponding interconnect device has also decreased.
The decrease in spacing between contacts of an interconnect device has necessarily increased the capacitance therebetween. Thus, a signal on a first contact of an interconnect device may affect the signal on a second contact of the interconnect device. This phenomenon is known as cross-talk. Cross-talk increases the noise on a contact, and thus adversely affects the reliability of the interconnect system.
Electromagnetic Interference (EMI) is another source of noise which reduces the reliability of interconnect systems. Typically, a low background level of EMI is present in the environment. Other, more obtrusive sources of EMI included IC testers, computers, test equipment, cellular phones, television and radio signals, etc. All of these sources of EMI should be considered when testing higher performance integrated circuits.
Another consideration of interconnect devices is the impedance provided by the corresponding contacts. It is recognized that the interconnect path between, for example, a semi-conductor package lead and a terminal on a printed circuit board, should have a relatively high and stable bandwidth across all applicable frequencies. That is, not only should the impedance of the interconnect system be minimized as disclosed in Johnson, but the impedance should also be controlled such that a relatively flat bandpass over all applicable frequencies exists.
To achieve a stable bandpass, it is often important to have a contact which provides impedance matching between a corresponding input of an integrated circuit and the corresponding driver. For example, if a tester is driving an input of an integrated circuit device via an interconnect device, it may be important for the interconnect device to provide an impedance such that the impedance of the driver matches the input impedance of the integrated circuit. Since the input impedance of the integrated circuit is often fixed, the impedance of the interconnect device may be used to correct for any impedance mismatch between the driver and the integrated circuit. Impedance matching may be important to minimize reflections and other noise mechanisms which may reduce the reliability and accuracy of the corresponding system.
Accordingly, a need exists for an improved electrical interconnect system to be utilized for interconnecting integrated circuit devices with printed circuit boards or for interconnecting multiple printed circuit boards. The interconnecting device should provide shielding for both cross-talk and EMI. The interconnect device should also allow the user to control and/or select the impedance for each contact provided therein.